Tutorial

This tutorial is meant as a starting point for your developments. It is not complete and will be extended.

For some examples, you need Icarus Verilog in your path (https://github.com/steveicarus/iverilog). If you want to proceede to synthesis for FPGAs or are just just looking for a convenient way to get started, we recommend using the OSS Cad Suite from YosysHQ (https://github.com/yosyshq/oss-cad-suite-build). It contains all necessary tools and runs without installation in Windows and Linux.